IRC log of #cubox of Mon 17 Jul 2017. All times are in CEST < Back to index

08:03 topi`_> hm, I see cpufreq is not enabled on the kernel 4.4.8-mcbin-marvell
08:03 topi`_> can I just enable it at kernel build options?
08:04 jnettlet[m]> topi`_: yes it should be working
08:05 topi`_> I guess I need to pull from HEAD?
08:08 jnettlet[m]> has it still not been pushed by Marvell?
08:09 topi`_> my kernel is from May
08:09 topi`_> Linux localhost.localdomain 4.4.8-mcbin-marvell #1 SMP PREEMPT Mon May 15 18:59:41 UTC 2017 aarch64 aarch64 aarch64 GNU/Linux
08:10 jnettlet[m]> http://wiki.macchiatobin.net/tiki-index.php?page=Enable+Power+Management+on+MACCHIATObin
08:10 topi`_> it would be nice to be able to force lower frequencies after I enabled the cores @ 2000mhz :)
08:10 topi`_> force in software, and not touch the jumpers :)
08:10 jnettlet[m]> looks like we need to be updating binaries faster
08:10 jnettlet[m]> you can. scaling works well
08:11 topi`_> who's responsible for the macchiatobin.net site?
08:11 topi`_> interesting: " It is necessary to have the power management firmware included in the bootloader image."
08:11 jnettlet[m]> Marvell, however some of the content is ours
08:11 topi`_> it seems they have some kind of hardwrae block for controlling things like clocks, etc. Just like the RPM subsystem in Snapdragon SoCs
08:15 topi`_> it seems I have to update UBOOT to get that MSS firmware going
08:16 topi`_> "Please make sure the MACCHIATObin board will not experience power loss during the entire updating process, otherwise, the MACCHIATObin will be bricked due to an unfinished bootloader update."
08:16 topi`_> I need to install an UPS :)
08:17 jnettlet[m]> that is not true. You just need to do a recovery
08:17 jnettlet[m]> do you have u-boot initializing from SPI-NOR?
08:17 topi`_> I think so
08:18 topi`_> let me check the bootloader log
08:21 topi`_> Booting from SPI NOR flash 1 (0x32)
08:21 topi`_> can the SPI NOR hold two bootloaders at the same time?
08:21 topi`_> perhaps with a "switching" scheme when one of them triggers a watchdog ;)
08:22 topi`_> it seems to be loading BL1, BL2, BL3
08:22 topi`_> "The purpose of rebuilding the bootloader image is to include MSS firmware(SCP_BL2) into the image. "
08:22 topi`_> this seems to implicate that this MSS firmware BL2 somehow overrides the BL2 my setup is loading now?
08:23 topi`_> s/implicate/imply/
08:25 topi`_> I think I have to rebuild the ATF (trusted firmware) and not the UBOOT per se
08:25 jnettlet[m]> oh fyi. for those looking for "off the shelf" heatsink solutions. In a stroke of brilliance this weekend I realized that most NorthBridge cooling solutions for gaming PCs are sized about perfect for our boards and soms.
08:25 topi`_> since those NOTICEs come out before U-Boot banner
08:26 jnettlet[m]> topi`_: I would update both while you are at it.
08:26 topi`_> jnettlet[m]: exactly. I'm using a cooling fan of Northbridge from some old Atom motherboard
08:26 topi`_> jnettlet[m]: if I screw up UBOOT, does the ATF know how to load it from e.g. SDcard?
08:26 jnettlet[m]> anyways. So I have order 3-4 different active and passive solutions and will write up some reviews.
08:26 jnettlet[m]> post some numbers etc.
08:27 jnettlet[m]> topi`_: you just need to change the boot method jumpers back to sdhc.
08:27 topi`_> right
08:27 topi`_> is the ATF always loaded from NOR?
08:27 topi`_> or do those jumpers affect that, as well?
08:28 jnettlet[m]> ATF and u-boot are all packaged into a single image. They are all loaded from the same boot method.
08:28 jnettlet[m]> This is the coolest looking option I have found. http://www.frozencpu.com/products/10061/vid-139/Titan_Iron_Heart_Northbridge_Active_Chipset_Cooler_TTC-CSC31TZRB_.html
08:29 jnettlet[m]> I also like that it flows across the board rather than vertically
08:32 topi`_> what kind of cross compiler do I need for the 8040? Does it boot into aarch32 or aarch64?
08:32 jnettlet[m]> aarch64
08:32 jnettlet[m]> I generally just use the linaro builds.
08:34 topi`_> yeah
08:34 topi`_> is there a linaro .deb for debian/jessie?
08:34 jnettlet[m]> I don't think so. I usually grab the tarball and extract it
08:41 topi`_> I guess I should grab the tarball from aarch64-elf directory and not aarch64-linux-gnu
08:42 topi`_> since the latter has some binds to the glibc
08:42 topi`_> glibc is useless for building uboot
08:42 jnettlet[m]> I am using. gcc-linaro-6.2.1-2016.11-x86_64_aarch64-linux-gnu
08:42 jnettlet[m]> but I use it as a general toolchain for everything
08:44 topi`_> is 5.4.1 any good?
08:44 topi`_> 6.2 is pretty bleeding edge ;)
08:48 topi`_> it seems this tar was not designed to be just dropped to /usr/local
08:49 coburn> rip
08:50 jnettlet[m]> yeah, but compiling with 6.2 has the functionality where u-boot will compile out unused strings making the bootloader smaller
08:52 jnettlet[m]> well look at this beauty. exactly what I am looking for. https://www.startech.com/Cards-Adapters/HDD-Controllers/SATA-Cards/pcie-m2-ngff-ssd-adapter-card~PEXM2SAT32N1
08:53 topi`_> I immediately ran into trouble with this gcc 5.4 toolchain. as: unrecognized option '-EL'
08:53 jnettlet[m]> that will give me 5 sata ports, and support a pcie nvme drive
09:01 topi`_> damn, my /usr/local has become messy...
09:01 topi`_> hosts two different linaro toolchains :)
09:04 topi`_> now I can't compile it because missing file linux/compiler-gcc6.h
09:04 topi`_> sheeeesh
09:05 topi`_> jnettlet[m]: have you managed to compile that uboot from marvell's git and if so, which branch? I am using the one documented in the macchiatobin.net page
09:05 topi`_> On branch u-boot-2015.01-armada-17.04
09:06 vpeter> topi`_: For missing file you need something like https://lkml.org/lkml/2015/4/14/576
09:07 topi`_> where does that file belong to? /usr/local/include or the debian system /usr/include ?
09:08 topi`_> the complexity of modern linux is killing me... I started with slackware with a 200 MB root fs...
09:09 topi`_> hmm it seems this compiler-gcc5.h lives inside the UBOOT files
09:13 topi`_> the "unrecognized option -EL" seems to become from the fact that it is launching x86_64-linxu-gnu as and not the crosscompiler one
09:13 topi`_> is this Makefile buggy or something?
09:13 topi`_> did Marvell test it at all :D
09:14 vpeter> topi`_: yes, file should be part of uboot.
09:15 topi`_> the makefile looks fine with $(CROSS_COMPILE) in the usual places
09:16 topi`_> it seems as is not called directly, but via aarch64-elf-gcc
09:16 topi`_> why it calls "as" and not "aarch64-elf-as" beats me
09:21 topi`_> oh, there is a '-B' option for gcc to specify where to look for as and friends
09:21 topi`_> and I did not copy the "aarch64-elf" directory in place, with its bin
09:21 topi`_> now it found it! magic
09:22 topi`_> I guess I should just have untarred that linaro tarball into $HOME and then added the bin there to $PATH
09:23 topi`_> marvell somewhat unwisely provides tools/marvell/dtc as a 80386 elf binary, like that would be some golden standard
09:23 topi`_> it could be a python script instead and then I could run it on any platform
09:24 topi`_> *rant*
09:24 agraf`> topi`_: qemu-linux-user? :)
09:24 topi`_> I'm already typing apt-get install as we speak
09:25 topi`_> but this is taking my whole work day
09:25 agraf`> well, you never know how many amazing extra features their dtc has ;)
09:26 suihkulokki> I'ts probably amazing as in time travel five years back in history :P
09:27 topi`_> this is fine for vendor branches :)
09:27 topi`_> jnettlet[m]: my suggestion would be that Solidrun could provide "up-to-date" UBOOT and other binaries for macchiatobin customers
09:27 topi`_> even if marvell fails to do so
09:36 rabeeh> The current Marvell implementation of cpufreq is using fixed dividers 1:N; they have a fractional pll that they will use that will provide even more granular cpu frequencies
09:38 topi`_> for me, even working cpuidle would be great :)
09:39 topi`_> it seems to me that at 2.0 ghz, the 4 cores bring the heatsink to 85 deg celsius
09:39 topi`_> which would be fine under load, but at 0.00, this is not acceptable
09:55 topi`_> SF: Detected W25Q32BV with page size 256 Bytes, erase size 4 KiB, total 4 MiB
09:55 topi`_> 881292 bytes written, 65536 bytes skipped in 23.796s, speed 40739 B/s
09:55 topi`_> there it went!
09:55 topi`_> let's see if it works
09:55 topi`_> I'll update the uboot later
09:56 topi`_> bricked!
09:56 topi`_> ******** DRAM initialization Failed (res 0x1) ********
09:56 topi`_> DDR4 Training Sequence - FAILED
09:57 topi`_> mv_ddr4_center_of_mass_calc: if 0, subphy 0: poligon area too small 357 (dmin 16)
09:57 topi`_> mv_ddr4_receiver_calibrate failure
09:57 topi`_> I guess this is the main failure reason
10:00 topi`_> jnettlet[m]: I sent you the log of things, if you have any idea what went wrong
10:00 topi`_> I just followed the instructions from macchiatobin.net
10:01 topi`_> even double checked that all the env variables weren't misspelled :)
10:03 Artox> topi`_, clocks?
10:03 topi`_> mv-ddr repo is at branch mv_ddr-armada-17.04
10:03 Artox> doesn´t the atf build include settings for the clocks?
10:03 topi`_> Artox: good suggestion, I'll try to fiddle with the clocks
10:03 Artox> (its been a while)
10:03 topi`_> let's revert to the settings with which the board shipped
10:06 topi`_> now it failed on the 1st try, then 2nd try and it succeeded
10:06 topi`_> funny pieces of code, these marvell guys create
10:06 Artox> you gotta love non-deterministic automatons\
10:07 topi`_> it's been about 25 years from my studies in electical engineering...
10:08 topi`_> at that time, ASIC design was all the rage
10:09 topi`_> cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq
10:09 topi`_> 100000
10:09 topi`_> seems to work! we're no longer at 1.3 ghz!
10:30 Artox> oh, and topi`_ there is also 17.06 mv-ddr
10:31 Artox> I am currently using that without issues (and at 1,3GHz only)
10:33 Ke> topi`_: why not mv_ddr-armada-17.06 ?
10:33 Ke> yes, as noted
10:51 jnettlet[m]> topi`_: you should get the latest mv_ddr to support the faster memory speeds.
11:21 topi`_> Ke: I was just blindly following the instructions
11:21 topi`_> I can try
11:22 topi`_> faster memory is definitively useful since the SoC only has a diminutive 512K L2 cache
11:22 topi`_> even the i.MX6 has 1MB :)
11:29 jnettlet[m]> topi`_: the 8040 has 512K L2 cache per dual-core cluster, so 1MB total, and then 1MB shared L3
11:43 topi`_> interesting. That L3 is probably intended to serve all those engines and packet accelerators?
11:48 topi`_> now I seem to be able to bring down all cores down to 100mhz :)
11:48 topi`_> I'm running loads on all cores and let's see if it still climbs to 90C
12:54 topi`_> updated the mv_ddr to 17.06 and now it works much better. Let's try to up the DRAM freq
12:54 Artox> topi`_, perfect; also, 100MHz? Wow\
12:56 jnettlet[m]> yes, the 8040 goes down very low
12:58 Artox> finally a board that can make good use of frequency scaling governors
12:58 Artox> Is that working yet?
12:58 Artox> as in ondemand, or powersave governors
12:59 topi`_> wtf
12:59 topi`_> [ 2.795241] cpu cpu0: Failed to get clock rate for CPU 0
12:59 topi`_> now cpufreq disappeared
13:01 topi`_> NOTICE: Load image to AP MSS
13:01 topi`_> NOTICE: Loading MSS image from address 0x4023000 Size 0x559c to MSS at 0xf0580000
13:02 topi`_> it says the same things at bootloader time
13:02 topi`_> however, linux kernel thinks it cannot control the freq
13:06 topi`_> all I did was recompile the atf with mv_ddr from that another branch
13:06 topi`_> but I don't see how mv_ddr is related to the MSS
13:09 Artox> Interesting
13:10 Artox> topi`_, for reference, would you liek to try the tianocore openfirmware instead?