IRC log of #cubox of Fri 09 Feb 2018. All times are in CET < Back to index

06:38 Ke> suihkulokki: we could poke Paulk to figure out, whether that blob is somehow related to rk3399 blob
06:39 Ke> SR people are perhaps NDAd to not to tell us anyway
06:39 Ke> Rockchip got their firmware from ARM
06:39 Ke> so perhaps Marvell did too
07:25 jnettlet[m]> Ke: that firmware is nothing special. It is just a firmware image that runs on the integrated arm core.
07:25 jnettlet[m]> I think it is an m3 but can't remember off the top of my head. We are pushing to have the source released
07:26 Ke> thanks, would be much appreciated
07:27 jnettlet[m]> trust me, this won't be something happening tomorrow. It is always a long process with Marvell but we do our best
07:27 Ke> jnettlet[m]: are you allowed to state any relation to the rockchip blob, which is afaik reverse engineerd?
07:28 Ke> ie. is this Marvells blob or ARMs
07:28 Ke> +'s
07:29 jnettlet[m]> I am most certain this is Marvell's firmware. ARM may provide a reference but I am sure it is customized for Marvell's chip design.
07:30 Ke> and obviously modeled after RTOS demo3 =o)
07:31 jnettlet[m]> yeah it runs FReeRTOS
07:31 Ke> we have had customer ship us an application named adnroid demo something
07:31 Ke> something like top level ui or something
07:33 Ke> it's not like a normal person would eve have had a.out on executable PATH
07:33 jnettlet[m]> so strings on the binaries says CM3 so it is a Cortex-M3
07:34 Ke> why could this not be trustzoned?
07:34 Ke> just because M3 uses less power than trustzone on the main cpu?
07:35 Ke> or it needs to control the cpu, while the cpu is off
07:35 jnettlet[m]> I would say the latter
07:36 jnettlet[m]> unfortunately if you don't have little cores, trustzone becomes very inefficient
07:37 jnettlet[m]> Back with the OLPC days when we were using Marvell SOCs they including a small "security" core, which was a third core running at a 400mhz clock speed.
07:41 Ke> I remember OLPC being i586 Geode?
08:25 suihkulokki> jnettlet[m]: does there exist a working PM firmware for 17.10 branch of arm-trusted-firmware ?
08:25 jnettlet[m]> that was the original. Then the 1.5 was a VIA processor, and after that we switched to Marvell ARM cores for the 1.75 and 4
08:26 jnettlet[m]> suihkulokki: I already sent an email. Sorry we just get access to what is posted on github. If you want to post on their forum as well it may help to gain some traction.
08:33 Ke> is the pm fw a noop anyway, if you are running upstream kernel?
08:41 suihkulokki> jnettlet[m]: ok, thanks. I'm not very optimistic on the forum but lets try..
08:43 suihkulokki> Ke: the kernel uses psci to ask trustzone to handle cpu idle/hotplug. not sure about cpufreq.
08:44 suihkulokki> basicly the kernel maintainers got tired with supporting every arm soc having different way to put the cpu to sleep, and said
08:44 suihkulokki> heres psci, implement putting cores into sleep behind that
08:45 Ke> ok
11:12 suihkulokki> awesome, forum post vanished
11:20 suihkulokki> The armada mrvl_scp_bl2_7040.img has "strings" referring to PM while _8040 doesn't.
11:25 suihkulokki> someone more experimental than me could combining the AP part 7040.img with the CP part of 8040 ;)
12:11 Ke> more like reverse engineer and replace the whole thing
16:10 Ke> btw. I am having long uptime again with the mcbin, with the older kernel